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Four-Channel, 14-Bit Wideband Analog Input Board Sampling Rates to 50 MSPS per Channel; Four Wideband Analog Inputs with a Dedicated 14-Bit ADC per Channel Sustained Aggregate Rates to 100 MSPS Software-Selectable Input Ranges: �2.5V, �1.25V, �0.625V. Optional Input Ranges: �10V, �5V, �2.5V, or Transformer-Coupled 2Vp-p, 1Vp-p 1-MByte FIFO Data Buffer 66MHz PCI Compatibility and DMA Engine Provide Maximum Throughput Software-Configurable Data Path Supports Data Packing Coaxial or Ribbon Cable Inputs Simultaneous Sampling of All Channels Sample Clocking Supplied by Internal Rate Generator or External Source Hardware Sync I/O for Multiboard Synchronization On-Demand Internal Autocalibration: High DC Accuracy as well as AC performance Conforms to PCI Local Bus Specification, Revision 2.3, with Universal Signaling

The 16-channel PCI-16SDI analog input board provides high-density precision 16-bit analog input resources on a standard PCI expansion board, and requires no external filters for antialiasing. Optimized for flexibility and performance, the board is ideal for a wide variety of applications, ranging from simple precision voltage measurements, to the analysis of complex audio signals and waveforms. Each of the 16 sigma-delta analog input channels can be controlled by any one of four independent sample clocks, and multiple channels can be harmonically locked together. A deep FIFO buffer holds up to 256K channel-tagged input samples. A/ D conversions on multiple boards can be synchronized and phase-locked. Sample rates from 5 to 220 KHz per channel.

32 Differential or 64 Single-Ended 16-Bit Scanned Analog Voltage Input Channels 32-Channel Precision Scanning Excitation Current Source; 0.4ma to 10ma Options Input Ranges Selectable as ±10V, ±5V or ±2.5V Excitation Applied to any Channel Combination Under a Control Mask High Input Impedance for Channels Not Requiring Excitation Scan Rate Internally Adjustable from 0.06 to 3000 32-Channel Scans per Second External Hardware Sync Input/Output (Alternate Function for Channel 31) Data Buffered through a 64K-sample FIFO Continuous and Burst (One-Shot) Input Modes Scan Sizes from Two to 32 Channels-per-Scan; or Single-Channel sampling of any Channel On-Demand Internal Autocalibration DMA Engine Supports Block Mode Transfers Completely Software-Configurable; No Field Jumpers Single-width PMC Form Factor with EMI Shield and Panel Bezel

32 Differential Analog Inputs with Dedicated 200KSPS 16-Bit ADC per Channel Sampling Rates to 200 KSPS per Channel (6.4 MSPS Aggregate Rate) Simultaneous Sampling of all Inputs; Minimum Data Skew D32; 66MHz, 33MHz PCI Compatibility, with Universal 5V/3.3V Signaling Input Ranges: +⁄2.5V, +⁄5, +⁄10V; Software-Selectable Sync and Clock I/O Support External Control and Multiboard Configrations Increased Throughput Capacity with Local Data Packing Continuous, Burst and Single-Sample Clocking Modes Hardware Sync I/O for Multiboard Operation 1 MByte FIFO Data Buffer; 512 K-Samples in packed-data mode. 2-Channel DMA Engine Sampling Controlled by Internal Rate Generator, by Software Trigger, or Externally On-Demand Internal Autocalibration of all Channels Single-width PMC Form Factor High-Density Analog Inputs Industrial Robotics Acoustic Sensor Arrays Analog Event Capture Biometric Signal Analysis Dynamic Test Systems

32 Differential Analog Inputs with Dedicated 200KSPS 16-Bit ADC per Channel Compatible with Conduction-Cooled or Air-Cooled Hosts Without Faceplate Rear-Panel I/O Through P4 Factory-Configurable as either 31 Differential Channels with 2 Ground Pins, or as 32 Channels Consisting of 25 Differential Channels and 7 Pseudo-Differential Channels with a Common Inverted Input and Sync and Clock I/O. Simultaneous Sampling of all Inputs; Minimum Data Skew Sampling Rates to 200 KSPS per Channel (6.4 MSPS Aggregate Rate) D32; 66MHz, 33MHz PCI Compatibility, with Universal 5V/3.3V Signaling Increased Throughput Capacity with Local Data Packing Continuous, Burst and Single-Sample Clocking Modes Input Ranges: ±2.5V, ±1.25V, ±0.625V; Software-Selectable. An optional range set of ±10V, ±5V, ±2.5V is available. Hardware Sync I/O for Multiboard Operation 1 MByte FIFO Data Buffer; 512 K-Samples in packed-data mode. 2-Channel DMA Engine Sampling Controlled by Internal Rate Generator, by Software Trigger, or Externally On-Demand Internal Autocalibration of all Channels Single-width PMC Form Factor

32 Differential Analog Inputs with dedicated 1.0MSPS SAR 18-Bit ADC per channel; Exceptional combination of precision, throughput and channel density on PMC Simultaneous Sampling of all inputs; minimum data skew Sampling rates from zero to 1.0 MSPS per channel (32 MSPS aggregate rate) True Differential inputs minimize input noise and system interference Input ranges: +/-10V, +/-5V, +/-2.5V software-selectable 256 K-Sample FIFO data buffer SAR (successive approximation) ADCs provide true simultaneous sampling without a minimum sample rate limitation D32; 66MHz/33MHz PCI compatibility, with universal 5V/3.3V signaling 2-Channel DMA engine supports both block and demand mode DMA transactions Sampling controlled by an internal rate generator, by a software trigger, or externally Continuous, burst and single-sample clocking modes Hardware sync I/O for multiboard operation through both front-panel and internal ports On-Demand internal autocalibration of all channels Completely software-configurable; No field jumpers Single-width PMC form factor with integral EMI shield Available also with 16-Bit resolution at reduced cost

Six differential analog inputs with dedicated 18-Bit ADC per channel True simultaneous sampling of all inputs to 500 KSPS per channel SAR architecture; No minimum sample rate Software-selectable input ranges 1: +⁄-20V (40Vpp), +⁄-10V, or optional +⁄-10V, +⁄-5V ranges Independent 256-Ksample Input FIFO data buffer Low noise; >98 dB dynamic range with antialias filter disabled Integral antialias filter minimizes out of band components, 200kHz 5th order Chebyshev Hardware Clock and Sync I/O for multiboard Operation Timing controlled by internal rate generators, by software clocking, or externally Internal on-demand autocalibration 8-Bit Bidirectional TTL Digital I/O Port Two independent 24-Bit frequency dividers. Completely software-configurable; No field jumpers 66 MHz 32-Bit PCI support, with universal 5V/3.3V signaling DMA engine minimizes bus congestion Single-width PMC form factor with Integral EMI shield Internal power conversion; Dual regulation for maximum supply integrity Available on adapters for alternate form factors, including PCI, cPCI and PC104-Plus, as well as PCI-Express, PCIX and cPCIX

64 Analog inputs with dedicated 18-Bit SAR ADC per Channel Simultaneous sampling of all inputs; Minimum Data Skew Sampling Rates to 750 KSPS per channel (48 MSPS aggregate rate) Continuous, Burst and Single-Sample Clocking Modes Software and I/O pinout compatibility with the 16AI64SSA/C Selectable Differential Processing Simulates Differential Operation of Channel Pairs Input Ranges software-selectable as ±10V, ±5V, 0 to +5V or 0 to +10V Hardware Sync I/O for Multiboard Operation FIFO buffer provides 256 K-Sample data capacity at 18 bits; 512K at 16 bits with data packing. A software-selectable low-latency configuration provides 64 registers that duplicate the last sample from all A/D converters 2-Channel DMA Engine Sampling and burst triggering controlled by internal rate generators, or by direct software control, or externally On-demand internal autocalibration of all channels Completely software-configurable; No field jumpers D32; 66MHz, 33MHz PCI compatibility, with universal 5V/3.3V Signaling Internal Sync/Clock I/O connector provides behind-panel access to clock and sync signals PMC version protected with integral EMI shield over analog components

The PMC-16HSDI analog input board provides four or six precision 16-bit Sigma-Delta analog inputs, and requires no external antialiasing filters. Optimized for flexibility and performance, the board is ideal for a wide variety of applications, ranging from simple precision voltage measurements, to the analysis of complex audio signals and waveforms. A FIFO buffer holds up to 64K channel-tagged input samples. Each of the sigma-delta analog input channels can be controlled by either of two independent sample clocks, and multiple channels can be harmonically locked together. Sample rates are adjustable from 30 KSPS to 1.1M SPS, for a maximum aggregate rate of 4.4 MSPS. The input range is software selectable as ±1.25V, ±2.5V, ±5V or ±10V. Click here for more information on Sigma-Delta!

Sigma-Delta Conversion; No External Antialiasing Filters Required High Effective Sampling Rate; 16-32 Times the Effective Rate of Successive Approximation Converters Operating at the Same Conversion Rate Integral Antialiasing Input Filters Reject Out-of-Band Interference Components Software-Selectable Ranges: 1.25 Volts, 2.5 Volts, 5 Volts or 10 Volts Six 16-Bit Analog Input Channels; Dedicated Sigma-Delta Converter per Channel Sample Rates Adjustable up to 1,100 K-Samples per Second per Channel Two Independent Sample-Rate Generators; Adjustable with 0.2 Percent Resolution Low Noise; Less than 130µVRMS on 1.25 Volt Input Range 64K-Sample FIFO Buffer with 2-Channel DMA support. All Data is Channel-Tagged. Harmonic Sampling Supported, with Clocking Ratios Between Channels from 1 to 20 Auto calibration Uses Hardware Correction; No missing Codes Introduced Integral Shield Assures Minimum Susceptibility to Radiated Noise in PMC Environments