条件に該当する製品85件
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AMC538(Altera Carrier for FMC, Stratix-10™)
VadaTech FPGAモジュール AdvancedMC 物理 天体Altera Stratix-10 (Option for GX1650 or GX2800) •AMC Ports 4-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 •AMC Ports 12-15 and 17-20 are routed to the FPGA •Single module, mid-size AMC (full-size optional)
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AMC537(Altera Carrier for FMC, Stratix-10™, SoC)
VadaTech FPGAモジュール AdvancedMC 物理 天体Altera Stratix-10 System-On-Chip (SoC) •Option for SX1650 or SX2800 •AMC Ports 4-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 •AMC Ports 12-15 and 17-20 are routed to the FPGA
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AMC585(Zynq UltraScale+ FPGA, FMC+ Carrier, AMC)
VadaTech FPGAモジュール AdvancedMC 物理 天体Xilinx UltraScale+ XCZU19EG FPGA •Single FMC+ (VITA 57.4) site •8 GB of 64-bit wide DDR4 Memory (single bank) with ECC (CPU) •8 GB of 64-bit wide DDR4 Memory (single bank, FPGA)
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AMC584(Virtex UltraScale+™ FPGA with Zone 3, AMC)
VadaTech FPGAモジュール AdvancedMC 物理 天体Xilinx XCVU13P UltraScale+ •Two banks of DDR4 Memory • Total of 16 GB of DDR4 •High-speed Zone 3 connector for I/O
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CHAMP-WB 6U OpenVPX Virtex-7
Curtiss-Wright FPGAモジュール OpenVPX 防衛・OpenVPX™ (VITA 65) profile MOD6-PAY-4F1Q2U2T-12.2.1-11, VPX REDI (VITA 48 option) ・Single user-programmable Xilinx Virtex-7 FPGAs (X690T or X980T), with ・8 GB DDR3L SDRAM in two banks ・Four 4-lane serial data plane links to the backplane (support up to 10.3 Gbps data rates) ・Gen2 SRIO or alternate fabrics with different FPGA cores ・One 4-lane Gen3 PCIe connection to a Gen3 PCIe switch ・One additional x4 10.3 Gbps link to the backplane ・16 LVDS pairs to the backplane ・Two enhanced FMC interfaces with 128+ differential signal pairs ・One site supports JESD204B or Serial FMCs with up to 8 serial links ・The other site has optional support for up to 160 LVDS pairs with X690T FPGA ・Two Mezzanine sites with support for FMC (VITA 57) or enhanced FMC ・Onboard PCIe Gen3 switch - Two 8-lane expansion plane fabric ports to the backplane with configurable NTB support ・Sensors for monitoring board power consumption ・Support for ChipScope Pro and JTAG processor debug interfaces ・Backplane clock/sync paths to mezzanines sites ・FXTools BSP and FPGA design kit with highly-optimized IP Blocks, development environment, reference designs, scriptable simulation test benches and software libraries VxWorks and Linux variants available ・VITA 48 1” pitch format ・Ruggedization levels ・Air-cooled Level 0 (commercial) ・Conduction-cooled Level 200 (future) ・Path to variant with Processor (contact factory)
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AMC532
VadaTech FPGAモジュール AdvancedMC 物理 天体・AMC FPGA based on Altera Stratix-V (5SGXEA) in F1932 package ・Single module, mid-size or full-size ・VITA 57.1 FMC HPC Connector (compatible with LPC) ・All FMC LA, HA, HB pairs routed bi-directionally
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AMC530
VadaTech FPGAモジュール AdvancedMC 物理 天体・Altera Stratix IV Device EP4S100Gx in 1517 pin count (40mm x 40mm) ・AMC Ports 2-3 and 4-11 are routed to FPGA (protocols such as PCIe, SRIO, XAUI, etc. are FPGA programmable) ・Ports 0 and 1 are Muxed with P2020 GbE ・AMC FCLKA, TCLKA, TCLKB, TCLKC and TCLKD are routed
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AMC518
VadaTech FPGAモジュール AdvancedMC 物理 天体・AMC FPGA carrier for FMC per VITA-5 ・Xilinx Zynq-7000 FPGA in FFG-900 package (XC7Z045) ・AMC Ports 4-7 and 8-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 (protocols such as PCIe, SRIO, XAUI, etc. are FPGA programmable) ・AMC FCLKA, TCLKA, TCLKB, TCLKC and TCLKD are routed
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AMC516
VadaTech FPGAモジュール AdvancedMC 物理 天体・AMC FPGA carrier for FPGA Mezzanine Card (FMC) per VITA-57 ・Xilinx Virtex-7 690T FPGA in FFG-1761 package ・AMC Ports 4-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 (protocols such as PCIe, SRIO, XAUI, etc. are FPGA programmable) ・AMC Ports 12-15 and 17-20 are routed to the FPGA
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AMC512
VadaTech FPGAモジュール AdvancedMC 物理 天体・AMC FPGA carrier for FPGA Mezzanine Card (FMC) per VITA-57 ・Xilinx Virtex-5 FPGA in FF1136 package ・Up to 512 MB of FPGA DDR2 memory ・AMC Ports 4-7 and 8-11 routed to FPGA per AMC.1, AMC.2 and AMC.4 (FPGA programmable per protocol such as PCIe, 10 GbE or SRIO)