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8 High-Level or Low-Level Analog Input Channels Input Channels Share a Common Isolated Ground 16-Bit, 200KSPS ADC and Active Lowpass Filter per Channel Isolation-Side Signal Conditioning and A/D Conversion Exceptional 0.01 Percent Accuracy Across The Isolation Barrier Simultaneous Sampling of All Channels 240 VAC Isolation from the PCI bus Active Lowpass Filter Cutoff Frequency Selectable as 2 kHz or 75 kHz Post-Conversion Digital Filter Cutoff Frequency Adjustable Down to 1.0 Hz 32 K-Sample FIFO Buffer Selectable Input Ranges: �10V, �5V, �2.5V, �1.0V, �100mV, �50mV, �25mV 66 MHz PCI Support

4 Bus-Isolated Analog Output Channels 16-Bit DAC per Channel Isolation-Side D/A Conversion * Exceptional 0.01 Percent Accuracy Across The Isolation Barrier Clocking Rates to 400 KSPS per Channel Supports Continuous, Periodic and One-Shot Function Generation 240 VAC Galvanic Isolation from the PCI Bus 32 K-Sample FIFO Buffer Selectable Output Ranges: �10V, �5V, �2.5V 66 MHz PCI Support

16 Simultaneously-Sampled 14-Bit High-Speed Analog Input Channels Sampling Rates from Zero to 2.8 MSPS per Channel; Aggregate Rates to 45 MSPS Input Range; Factory-Configured: Widerange: ±10V, ±5V, ±2.5V, 0/+10V, or 0/+5V. Wideband: ±3V, ±1.5V, or ±0.75V (Software-controlled ranging available, with 3x increased input settling time) 16 Single-Ended or 8 Differential Input Channels; Software-Selected 1-MByte FIFO Data Buffer; 512-Ksample Capacity, with DMA Support 66MHz PCI Compatibility and Local Data Packing provide Maximum Throughput Pretriggering and Trigger-on-Level 40ns Input Rise and Fall times; 150ns Settling to 0.1% (90ns Input Rise and Fall times; 350ns Settling to 0.1% with software-controlled ranging) Mask-Selection of active Channels; No unnecessary Data Accumulation Sample Clocking from Internal Rate Generator or External Source Dual 24-Bit Timers Hardware Clock and Sync I/O for Multiboard Synchronization Two 16-Bit Direct-Write Analog Output Channels Byte-Wide Digital I/O Port On-Demand Internal Autocalibration ensures Maximum Accuracy under all conditions Conforms to PCI Local Bus Specification, Revision 2.3, with Universal Signaling Single-width PMC Form Factor with Integral EMI Shield. (Expanded-capability version available in standard PCI form factor)

20 Simultaneously-Sampled 14-Bit High-Speed Analog Input Channels Sampling Rates from Zero to 1.3 MSPS per Channel; Aggregate Rates to 26 MSPS Software-Selectable Input Ranges: ±10V, ±5V, ±2.5V, 0/+10V, 0/+5V. 20 Single-Ended or 10 Differentially-Processed Input Channels; Software-Selected 1-MByte FIFO Data Buffer; 512-Ksample Capacity, with DMA Support 66MHz PCI Compatibility and Local Data Packing provide Maximum Throughput Pretriggering and Trigger-on-Level 90ns Input Rise and Fall times; 350ns Settling to 0.1% Mask-Selection of active Channels; No unnecessary Data Accumulation Sample Clocking from Internal Rate Generator or External Source Dual 24-Bit Timers Hardware Clock and Sync I/O for Multiboard Synchronization Two 16-Bit Direct-Write Analog Output Channels Byte-Wide Digital I/O Port On-Demand Internal Autocalibration ensures Maximum Accuracy under all conditions Conforms to PCI Local Bus Specification, Revision 2.3, with Universal Signaling

Two Wideband 16-Bit 40 MSPS Analog Output Channels Clocking Rates from Zero to 40 MSPS per Channel; Aggregate Rates to 80 MSPS Software-Selectable Output Ranges: ±3V, ±1.5V, ±0.75V Optional ±10V, ±5V, ±2.5V ranges available, with reduced throughput and loading. 1-MByte FIFO Data Buffer; 512-Ksample Capacity, with DMA Support 66MHz PCI Compatibility and Local Data Packing provide Maximum Throughput Dynamic Linearity Correction: 0.003% DNL; 0.005% INL Output Clocking from Internal Rate Generator or External Source Simultaneous or Independent Output Clocking Dynamic control of Clocking Rates with Embedded Function Codes Hardware Clock and Sync I/O for Multiboard Synchronization 16-Bit 300-KSPS Analog Input Channel Byte-Wide Digital I/O Port Dual Rate Generators and Dual 24-Bit Timers On-Demand Internal Autocalibration ensures Maximum Accuracy under All Conditions Conforms to PCI Local Bus Specification, Revision 2.3, with Universal Signaling

64 Precision Analog Output Channels 16-Bit Resolution Update Rates from 3KSPS per Channel for 64 Channels, to 50KSPS for 2 Channels Software-Selectable Output Ranges of ±10V, ±5V, ±2.5V or ±1.25V 66MHz and 33MHz PCI Bus Support Output-Disconnect Feature Supports Multiple Redundancy Applications Output Disconnect Resistance: 1-Megohm (5-Ohms Connected) Direct Register Access to Individual Output Channels Double-Buffered Output Data Allows New Frame to Load Before Overwriting Outputs Bandwidths (-3dB) from 500Hz for 64 Active Channels, to 15kHz for 1 or 2 Channels Settling Times (0.01%) from 200uS for 1 or 2 Channels to 3ms for 64 Channels Active Channels Assignable from 2 to 64 Channels in Increments of 2 Channels Inactive Channels Driven to Midrange (Zero level) High Accuracy Ensured by Continuous Background Autocalibration Universal Signaling Supports Both 3.3V and 5V PCI Logic Levels Dual-Conversion Internal Supply Requires Only +5V Power from PCI bus Available on Adapters for Alternate Form Factors: PCI, cPCI, PC104-

The 12-channel ADADIO analog I/O board provides high-resolution 16-bit analog input, analog output and digital I/ O. Eight analog input channels are sampled simultaneously. The inputs can be sampled continuously or can be burst-sampled (up to 200,000 samples per channel for an aggregate rate of 1,600,000 samples per second). The inputs are converted and stored in a 32,000-sample FIFO buffer. The four analog output channels are accessed through independent registers, and can be updated either synchronously or asynchronously. Inputs and outputs have a factory-configured range of ±10V, ±5V or ±2.5V. A digital port provides eight bi-directional data lines and two control lines.

64 Analog Inputs with Dedicated 500KSPS 18-Bit SAR ADC per Channel Simultaneous Sampling of all Inputs; Minimum Data Skew Sampling Rates to 500 KSPS per Channel (32 MSPS Aggregate Rate) D32; 66MHz, 33MHz PCI compatibility, with universal 5V/3.3V Signaling Continuous, Burst and Single-Sample Clocking Modes Software and I/O pinout compatibility with the 16AI64SSA/C Selectable Differential Processing Simulates Differential Operation of Channel Pairs Input Ranges: ±10V, ±5V, 0/+5V, 0/+10V; Software-Selectable Hardware Sync I/O for Multiboard Operation 1 MByte FIFO Data Buffer provides 256K-Sample data capacity 2-Channel DMA Engine Sampling Controlled by Internal Rate Generator, by Direct software control, or Externally On-Demand Internal Autocalibration of all Channels Completely Software-Configurable; No Field Jumpers Auxiliary PXI Triggering Port Available through P1, P2.

The 16-Bit PMC-16AI64SSA analog input board samples and digitizes 64 input channels simultaneously at rates up to 200,000 samples per second for each channel. The resulting 16-bit sampled data is available to the PCI bus through a 256K-Sample FIFO buffer. Each input channel contains a dedicated 16-Bit sampling ADC. All operational parameters are software configurable. Inputs can be sampled in groups of 2, 4, 8, 16, 32 or 64 channels; or any single channel can be sampled continuously. The sample clock can be generated from an internal rate generator, or by software or external hardware. Input ranges are software-selectable as ±10V, ±5V or ±2.5V. The inputs can be clocked either continuously or in triggered bursts. An on-demand autocalibration feature determines offset and gain correction values for each input channel.

The PMC-16AO2MFS D/A board provides 400KHz-per-channel precision high speed 16-bit analog outputs, and supports arbitrary waveform generation. Two analog output channels are updated independently from an internal buffer, either at software-determined rates, or by an externally supplied clock. Flexible operating modes include continuous, periodic and triggered burst functions, as well as the seamless, dynamic concatenation of waveforms in real-time. Output ranges are supplied as ±10V, ±5V or ±2.5V. Internal auto calibration networks permit periodic calibration to be performed without removing the board or host from the system. This feature produces the optimum calibration situation, in which the board is calibrated in its actual operating environment.