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・Analog Input: 　　・Number of Channels 2, single-ended 　　・Sampling Frequency Up to 550MSPS 　　・Full Scale Input Voltage 2V2 pk-pk 　　・Device 2x TI ADS5463/ADS54RF63 　　・Input Bandwidth (3dB) >1.7GHz 　　・Input Impedance 50 Ohm, AC coupled 　　・SNR (device) 65 dBFS 　　・SFDR (device) 73 dBc 　　・ENOB (device) 10.1 bits at 250MHz ・Clock & Trigger Inputs: 　　・Clock Input Connector Front panel MMCX 　　・Clock Input 50 Ohm, AC coupled LVPECL 　　・Clock Input Frequency Sample rate is half input clock frequency (i.e. 1GHz for 500MSPS) ・Internal clock selectable from: 　　・600MHz: 300MSPS 　　・640MHz: 320MSPS 　　・800MHz: 400MSPS 　　・1000MHz: 500MSPS 　　・Trigger Input/Output Single-ended, 50 Ohm, LVPECL buffered to host FPGA ・Miscellaneous: 　　・LEDs 2x yellow (host FPGA controlled) 　　・Digital I/O 4 differential pairs ・Software/HDL Code: 　　・Host HDL Code Analog input hosted by our FusionXF suite on FPE650 6U quad FPGA VPX (contact Sales for other hosts) ・Environmental: 　　・Ruggedization levels Air-cooled, air-cooled rugged and conduction-cooled

製品カテゴリ アナログI/O フォームファクタ ・Front Panel Analog Signal Input 　　・Number of Channels: 2 (single ended) 　　・Connectors: AC coupled, front panel MMCX connector 　　・Full Scale Output: 0.5V pk-pk into 50 ohms 　　・Output Impedance: 50 ohms ・D/A Converter 　　・Quantity: 1 　　・Type: Analog Devices AD9744 　　・Sampling Rate: 210MSPS 　　・Resolution: 14 bits 　　・SNR @ 5 MHz output, 125MSPS: 77dB ・External Clock Input 　　・Connector: Front Panel MMCX 　　・Input Level: 1V pk-pk, sine or squarewave 　　・Input Impedance: 50 Ohms, AC coupled LVPECL 　　・Clock Selection: Controlled by FPGA ・Trigger 　　・Single-ended, 50 Ohm, DC coupled

製品カテゴリ アナログI/O フォームファクタ ・Front Panel Analog Signal Input: 　　・Number of Channels 2 　　・Connectors AC coupled, frontpanel MMCX connector 　　・Full Scale Input +10 dBm (2V pk-pk) into 50 ohms 　　・SNR 68dB 　　・SFDR 82dB ・A/D Converter: 　　・Quantity 1 　　・Type Linear Technology LTC2285 　　・Sampling Rate 125MSPS 　　・Resolution 14 bits 　　・Bandwidth 100kHz to 110MHz full power bandwidth ・External Clock Input: 　　・Connector Front Panel MMCX 　　・Input Level 200 - 1000 mV pk-pk, sine or squarewave 　　・Input Impedance 50 Ohms, AC coupled LVPECL 　　・Clock Selection Controlled by FPGA ・Trigger: 　　・Single-ended, 50 Ohm, DC coupled

Precision 16-Bit simultaneously-clocked analog outputs: R-2R DAC per channel  Available with either 16 single-ended outputs, or 16 balanced-differential outputs  Software-selectable ranges of ±10V, ±5V. Optionally 0 to +10V, or 0 to +5V.  Output clocking rates from zero to 500K samples per second per channel.  Optional Outputs-Disconnect feature supports multiple-board redundancy, and eliminates outputs activity during autocalibration  Remote ground-sense input minimizes the effects of interground potentials  Supports both Block-mode and Demand-mode DMA transactions  2 Megasample output data FIFO buffer; Configurable as open or closed (circular)  Simultaneous output clocking  Multiboard synchronization supported  Continuous and Triggered-Burst output modes support seamless waveform sequencing  Data clocking rate controlled internally or externally  High accuracy ensured by on-demand Autocalibration of all channels  Single-width PMC form facto

24 wide-range differential 24-Bit simultaneously-sampled analog input channels.  Sample rates from 1.0 Kilosamples per second (KSPS) to 200 KSPS per channel.  Synchronous operation; all channels clocked simultaneously.  Software-selectable analog input ranges of ±10V, ±1V, ±100mV, ±10mV. (Optional ±10V, ±5V, ±2V, ±1V ranges, or ±5V, ±0.5V, 50mV, ±5mV ranges also available).  Delta-Sigma input conversion minimizes or eliminates the need for antialias filtering.  Low noise: 106dB typical dynamic range.  256K-sample analog input FIFO buffer.  Sample clock source selected as internal or external.  Hardware sync and clock I/O for multiboard synchronization.  On-demand autocalibration ensures DC offset precision as well as AC performance.  Conforms to PCI Express Specification revision 1.0a, single-lane.  DMA engine supports both block-mode and demand-Mode transfers.  Integrated DC/DC conversion and regulation of precision internal supply voltages.

 Four 20-Bit analog output channels.  Software-selectable output configuration: 2-Wire Single-ended or 3-Wire Differential.  Simultaneous Clocking; Individual 20-Bit R-2R DAC per output channel.  Clocking rates from zero to 500KSPS.  Software-selectable fullscale output ranges: ±10V and ±5V.  8th-Order reconstruction filter in each output channel.  Optional Outputs Disconnect feature ensures quiet outputs during autocalibration and selftest operations. Software control. Adds 1-Ohm to R-out.  Remote ground sensing to minimize single-ended errors.  On-demand autocalibration of all channels.  256K-sample output FIFO buffer.  Internal sample rate generator with 24-Bit rate divider.  Hardware trigger and clock I/O for multiboard synchronization.  Eight Bidirectional digital TTL I/O lines.  Conforms to PCI Express Specification revision 1.0a, single-lane.  Standard PCI Express Short-card form factor.  DMA Engine supports block-mode and demand-mode transfers in two DMA channels.

Six Differential Analog Inputs with dedicated 18-Bit ADC per channel  True Simultaneous Sampling of all inputs from Zero to 12MSPS per channel  2.0 Megasample input data FIFO buffer  SAR Architecture; No minimum sample rate; Minimum Latency  Selectable Input Ranges: (Order Wideband or High-Level) Wideband: ±2.5V, ±1.25V, ±0.625V ; or High-Level: ±10V, ±5V, ±2.5V  Miniature MMCX coaxial system connectors for analog inputs and timing I/O.  Hardware Clock and Sync I/O for multiboard operation  Timing Controlled by internal rate generators, by software clocking, or externally  DMA Engine minimizes bus congestion  Dual Power Conversion for optimum internal power voltage integrity  Internal on-demand Autocalibration of all channels  PCI Express control interface  XMC form factor  Extended-temperature version available

 Precision 16-Bit simultaneously-clocked analog outputs: R-2R DAC per channel  Available with either 64 single-ended outputs, or 32 balanced-differential outputs  Software-selectable ranges of ±10V, ±5V. Optionally 0 to +10V, or 0 to +5V.  Output clocking rates from zero to 500K samples per second per channel.  Reconstruction filter in each output channel: 6th order Lowpass, 300Hz-100kHz.  Optional Outputs-Disconnect feature supports multiple-board redundancy, and eliminates outputs activity during autocalibration  Remote ground-sense input minimizes the effects of interground potentials  Supports both Block-mode and Demand-mode DMA transactions  256K-Sample output data FIFO buffer; Configurable as open or closed (circular)  Simultaneous output clocking, with emulated sequential outputs also supported  Multiboard synchronization supported  Continuous and Triggered-Burst output modes support seamless waveform sequencing  Data clocking rate controlled internally or externally  High accuracy ensured by on-demand Autocalibration of all channels  x1 Link PCI Express Port operating at 2.5Gbps  Available on multiple form factors, including PCI, and cPCI, as well as PC104-Plus, PMC, PCIX and cPCIX with reduced channel count. Contact Sales for availability

8 Differential Analog Inputs with Dedicated 12-Bit, 2.0 MSPS ADC per Channel True Simultaneous Sampling of all Inputs; Minimum Data Skew Sampling Rates to 2.0 MSPS per Channel (16 MSPS Aggregate Rate) Input Ranges: ±1V, ±100mV; Factory Configured. Custom ranges to ±10V. 64-Ksample Analog Input FIFO Data Buffer Supports DMA Transfers in Two Channels in Block-Mode or Demand-Mode 4 Analog Output Channels with Direct Register Access 16-Bit Bidirectional Digital I/O Port Sampling Controlled by Internal Rate Generator, by Software Trigger, or Externally On-Demand Internal Autocalibration Hardware Sync I/O for Multiboard Operation Integral Dual-Conversion Precision Analog Power Supplies Completely Software-Configurable; No Field Jumpers Conforms to PCI Local Bus Specification, Revision 2.3, with Universal Signaling

The 12AIO provides a cost effective high-speed 12-bit analog input/output and digital I/O board. Four analog output channels (at 300,000 samples/ sec per channel) are updated either synchronously or asynchronously, and support arbitrary waveform generation. The analog inputs are configurable as either 32 single-ended or 16 differential inputs, and can be scanned continuously or in bursts. Inputs and outputs have a common software selected range of ±10V, ±5V or ±2.5V, and are accessed through independent 32K-sample FIFO buffers. Internal auto-calibration networks permit calibration to be performed without removing the board from the system. Software controlled test configurations include a loop-back mode for monitoring all analog output channels.