CHAMP-XD33U VPX Intel Ice Lake Xeon D-1700 HPEC and Cognitive DSPModule Aligned with The SOSA™ Technical Standard

The CHAMP-XD3 combines the high core count and floating-point perfor
mance of the Intel “Ice Lake D” processor with the substantial bandwidth and
system-enabling features of the VITA 3U OpenVPX form-factor. Providing an
extended temperature Xeon D-1700 LCC processor with 10 dual-threaded
cores, the CHAMP-XD3 brings Intel’s AVX512 floating-point capability to the
rugged embedded marketplace. Processor performance is enhanced with
48 GB of high capacity DDR4-2400 in three independent memory channels,
providing over 50% more memory bandwidth than prior generation modules
ensuring memory accesses are not a bottleneck.
The Ice Lake D processor provides new Intel Deep Learning Boost with op
timized commands for AI applications which are ideal for cognitive EW and
other smart sensor processing applications.
Aligned with the SOSA Technical Standard, the CHAMP-XD3 supports a 40
GbE Data Plane, dual 10 GbE interfaces, and up to 16 lanes of Gen3 PCI
Express® (PCIe) on the Expansion Plane, with a pinout aligned to the Payload
PIC profile of the SOSA standard.
The CHAMP-XD3 includes a AMD Zynq™ UltraScale+™ MPSoC field pro
grammable gate array (FPGA) with additional security features, embedded
quad-core Arm® A53 processor and dual-core R5 processor used for en
hanced TrustedCOTS™ security, as a co-processor or for general purpose
I/O. System monitoring and health is supported with IPMI (VITA 46.11) with
HOST extensions as required for SOSA conformance.