VPX3-E320 Ruggedized Universal Software-Defined RadioDeveloped in Alignment with the SOSA™ Technical Standard
Design based on the Ettus Research
USRP E320
• Alignment to the SOSATM and CMOSS
Technical Standards
• Planned alignment with VICTORY &
MORA
- Support for development with USRP tool
f
lows (UHD, RFNoC)
• Support for C, C++, and Python - Support for industry standard SDR
development tools, such as GNU Radio &
REDHAWK - Optional FPGA programming with Xilinx
Vivado
• RF: 2x2 MIMO (2 Rx, 2 Tx)
• Frequency range: 70 MHz to 6 GHz
(<30MHz planned)
• Bandwidth: up to 56 MHz
• Synchronization: 100 MHz and 1 PPS
backplane sources
• FPGA: Xilinx Zynq 7045
• Dual-core Arm Cortex A9
• 1 Gb and 10 Gb Ethernet I/O
• Conduc
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